Introduction to PIPPINFINAL
shows the output of the current program with its original data. The contents of symbolic location W have changed to 57 (X * (Y + Z)), and the PC has value 10, indicating that the last instruction executed was the HLT at location 8 in RAM.
Thus constrained, we defined the PIPPIN language to consist of these 14 instructions
Here, then, is a sample program written in PIPPIN shown in both its assembly language and binary forms. The program implements the assignment statement: X = (3 * Y) + (2 / W).
The Fetch and Execute Cycles
A computer program basically constitutes of instructions. We are, today, generally used to program computers using High Level Languages (HLL - C++, C, Pascal, Fortran, Java, etc.).
Those programming languages are not understood by the CPU, so the compiler compiles our code into something that the machine will be able to handle or execute. The output of this phase is a machine language program.
But the translations are not quite over.
The computer is not able to handle or to understand these lines of code either, so here is where the fetch-execute phase takes place. The CPU is only able to understand binary code and the machine language was designed in a way that all of the instruct ions, that we can possibly make use of, are already translated into binary code and kept into a table in a specified area of the memory.
What happens when I make use of a assembly language instruction?
As we’ll see in the examples, there are basically four categories of instructions:
No address instruction
Two addresses instruction
Four addresses instruction
Four addresses instruction
The so-called OP (operation code) is the binary code associated with the particular instruction (add, sub, etc). This is what we are looking for, this is finally something that could be used by the CPU.
It is just after the fetch phase that this OP will be available and the instruction could be executed. Instructions are loaded into memory sequentially and the PC (Program Counter) is the register that keeps tracks of the execution point in the program . The PC contains an address in memory and once the content of this register is read the content of the address is read from memory into the IR (Instruction Register).
Unfortunately there is not direct correspondence between the content of the PC and what I want to put in the IR because the PC contains an address into a table in the memory where the OP is contained. So in order to load the real OP into the IR the OP has to be retrieved from memory. These two steps are know as decode phase and they are necessary for the correct execution of the instruction. At this point the PC is incremented in order to point to the next instruction of the program.
The content of the above paragraph is what is known as fetch phase.
At this point the instruction is executed using the necessary resources (ALU, registers, etc.) and the result are stored in those locations specified by the OP.
In the case when we need to use instructions which refers or specify to a specific memory location, those addresses has to be loaded before the execution phase begins so that the CPU knows where to retrieve or store operators needed in the instruction.